The bus structure for a polymorphic computer system

  • Andrew Roach

    Student thesis: Master's Thesis


    The proposed advances in fifth Generation Computing Systems aim to provide an Intelligent Image to the system user. While such images are software based, written in languages such as Prolog and LISP, much of the proposed hardware architecture has lacked innovation and vision. This Thesis addresses these two important points by providing an insight into bus interaction for various scheduling schemes and system configurations, in order that these unique system architectures may evolve.

    This Thesis discusses the issues relevant to the application of cellular computer systems and their projected performance characteristics. The cellular computer system under study is the Group Processor System, which is a TRANSPUTER like computer architecture.

    The Group Processor System is simulated, and important results are illustrated in graphical form. These graphs are analysed, and the conclusions drawn are of use to computer architects who wish to design and construct Group Processor Systems. The results may also be of use to those architects wishing to develop TRANSPUTER based computer systems.

    As a result of the simulation, a major design fault in the original Group Processor proposal resulted in a severe 'bottle-neck' in input-output processing. This has been greatly improved by the provision of the Terminal Environment Switching System; which is also detailed in this Thesis. The result of this research has yielded a more flexible Group Processor System which may be targetted for applications in Intelligent and Knowledge Based Systems.

    The relevance of current architecture is discussed in the context of proposed fifth Generation computing needs.
    Date of AwardFeb 1986
    Original languageEnglish
    Awarding Institution
    • Polytechnic of Wales

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